Linear’s SAR ADC has filtered and no latency output options
- 作者：Ella Cai
- 发布时间：：2017-04-06
A 32-bit successive approximation register (SAR) analogue-to-digital converter with dual outputs and digital filters to optimise signal bandwidth has been introduced by Linear Technology, now owned by Analog Devices.
The LTC2500-32 provides a digitally filtered output that achieves up to 148dB of dynamic range as well as a no latency output comprising an over-range detection bit, a 24-bit representation of the input voltage difference, and a 7-bit representation of the common mode input voltage.
The no latency output is matched to the digitally filtered output, avoiding the mismatch and drift that typically occur in applications requiring an additional faster ADC to monitor signal integrity in parallel with a precision ADC.
Each of the two outputs provides an accurate representation of the voltage difference applied between the two input terminals.
The integrated configurable digital filter offers seven filter types and 13 different downsampling factors. This allows designers to trade off bandwidth, filter response and noise performance for each application.
The ADC has specified linearity of 0.5ppm typical and 2ppm guaranteed maximum INL, and negligibly low gain and offset drift over wide temperature ranges.
The LTC2500-32 provides a digitally filtered output that achieves up to 148dB of dynamic range as well as a no latency output comprising an over-range detection bit, a 24-bit representation of the input voltage difference, and a 7-bit representation of the common mode input voltage.
The no latency output is matched to the digitally filtered output, avoiding the mismatch and drift that typically occur in applications requiring an additional faster ADC to monitor signal integrity in parallel with a precision ADC.
Each of the two outputs provides an accurate representation of the voltage difference applied between the two input terminals.
The integrated configurable digital filter offers seven filter types and 13 different downsampling factors. This allows designers to trade off bandwidth, filter response and noise performance for each application.
The ADC has specified linearity of 0.5ppm typical and 2ppm guaranteed maximum INL, and negligibly low gain and offset drift over wide temperature ranges.
