SiFive and UltraSoC team up
- Autore:Ella Cai
- Rilasciare il:2017-09-08
SiFive, the designer of custom silicon around RISC-V, says that UltraSoC will provide debug and trace technology for the SiFive Freedom platform as part of the DesignShare initiative.
UltraSoC’s embedded analytics IP will be available through the recently announced SiFive DesignShare ecosystem that gives any company, inventor or maker the ability to harness the power of custom silicon. UltraSoC’s debug and trace functionality will enable users of the Freedom platform to access a wide variety of tools and interfaces to use in their developments.
The DesignShare concept encompasses pre-integrated solutions to lower the upfront engineering costs required to design custom ICs based on the SiFive Freedom platform.
“SiFive was founded with the mission to disrupt the semiconductor industry by leveling the playing field for anyone who wants to develop custom silicon,” says SiFive CEO Naveed Sherwani, “the DesignShare ecosystem enables aspiring system designers with the tools they need when designing their SoC. We’re thrilled to welcome UltraSoC to the DesignShare ecosystem and look forward to seeing the innovations our collaboration brings to the market.”
UltraSoC’s IP simplifies the development of systems on chip (SoCs) and provides embedded analytics features that enable chip makers to cut development costs and increase the profitability of their projects.
The company has helped produce specification for RISC-V processor trace functionality, which UltraSoC and SiFive intend to work together with the RISC-V Foundation to incorporate fully into the RISC-V standard.
Trace is a fundamental requirement for developers working with any processor architecture, allowing engineers to view the behavior of their programs in detail, isolating bugs and identifying areas for improvement. UltraSoC and SiFive IP fully supports this recently released trace specification.
UltraSoC design starts
“UltraSoC is committed to increasing the number of silicon design starts, and our participation in DesignShare with SiFive is a natural extension of that work,” says UltraSoC CEO Rupert Baines (pictured) “we are committed to driving the acceleration of the democratisation of the semiconductor industry, both through our membership in the RISC-V Foundation and via individual partnerships like this one with SiFive. Making UltraSoC’s IP available through the DesignShare model will enable chipmakers everywhere to leverage the benefits of open source hardware and introduces new innovative designs to the market.”
UltraSoC’s embedded analytics IP will be available through the recently announced SiFive DesignShare ecosystem that gives any company, inventor or maker the ability to harness the power of custom silicon. UltraSoC’s debug and trace functionality will enable users of the Freedom platform to access a wide variety of tools and interfaces to use in their developments.
The DesignShare concept encompasses pre-integrated solutions to lower the upfront engineering costs required to design custom ICs based on the SiFive Freedom platform.
“SiFive was founded with the mission to disrupt the semiconductor industry by leveling the playing field for anyone who wants to develop custom silicon,” says SiFive CEO Naveed Sherwani, “the DesignShare ecosystem enables aspiring system designers with the tools they need when designing their SoC. We’re thrilled to welcome UltraSoC to the DesignShare ecosystem and look forward to seeing the innovations our collaboration brings to the market.”
UltraSoC’s IP simplifies the development of systems on chip (SoCs) and provides embedded analytics features that enable chip makers to cut development costs and increase the profitability of their projects.
The company has helped produce specification for RISC-V processor trace functionality, which UltraSoC and SiFive intend to work together with the RISC-V Foundation to incorporate fully into the RISC-V standard.
Trace is a fundamental requirement for developers working with any processor architecture, allowing engineers to view the behavior of their programs in detail, isolating bugs and identifying areas for improvement. UltraSoC and SiFive IP fully supports this recently released trace specification.
UltraSoC design starts
“UltraSoC is committed to increasing the number of silicon design starts, and our participation in DesignShare with SiFive is a natural extension of that work,” says UltraSoC CEO Rupert Baines (pictured) “we are committed to driving the acceleration of the democratisation of the semiconductor industry, both through our membership in the RISC-V Foundation and via individual partnerships like this one with SiFive. Making UltraSoC’s IP available through the DesignShare model will enable chipmakers everywhere to leverage the benefits of open source hardware and introduces new innovative designs to the market.”
