Samsung starts 2nd gen 10nm DRAM production
- 著者:Ella Cai
- 公開：:2017-12-20
Samsung says it has begun mass producing 2nd-generation 10nm nanometer 8Gb DDR4 DRAM.
The 2nd-generation delivers a 30% ‘productivity gain’ over the company’s 1st-generation 10nm-class 8Gb DDR4, says Samsung. Performance and power have been improved about 10% and 15%. respectively.
The new 8Gb DDR4 can operate at 3,600Mbps per pin, compared to 3,200 Mbps of the company’s 1x-nm 8Gb DDR4.
To enable these achievements, Samsung has applied new technologies, without the use of an EUV process. The innovation here includes use of a high-sensitivity cell data sensing system and a progressive “air spacer” scheme.
In the cells of Samsung’s 2nd-generation 10nm-class DRAM, a newly devised data sensing system enables a more accurate determination of the data stored in each cell, which leads to a significant increase in the level of circuit integration and manufacturing productivity.
The new 10nm-class DRAM also makes use of a unique air spacer that has been placed around its bit lines to dramatically decrease parasitic capacitance. Use of the air spacer enables not only a higher level of scaling, but also rapid cell operation.
With these advancements, Samsung is now accelerating its plans for much faster introductions of next-generation DRAM chips and systems, including DDR5, HBM3, LPDDR5 and GDDR6, for use in enterprise servers, mobile devices, supercomputers, HPC systems and high-speed graphics cards.
Samsung has finished validating its 2nd-generation 10nm-class DDR4 modules with CPU manufacturers, and next plans to work closely with its global IT customers in the development of more efficient next-generation computing systems.
The 2nd-generation delivers a 30% ‘productivity gain’ over the company’s 1st-generation 10nm-class 8Gb DDR4, says Samsung. Performance and power have been improved about 10% and 15%. respectively.
The new 8Gb DDR4 can operate at 3,600Mbps per pin, compared to 3,200 Mbps of the company’s 1x-nm 8Gb DDR4.
To enable these achievements, Samsung has applied new technologies, without the use of an EUV process. The innovation here includes use of a high-sensitivity cell data sensing system and a progressive “air spacer” scheme.
In the cells of Samsung’s 2nd-generation 10nm-class DRAM, a newly devised data sensing system enables a more accurate determination of the data stored in each cell, which leads to a significant increase in the level of circuit integration and manufacturing productivity.
The new 10nm-class DRAM also makes use of a unique air spacer that has been placed around its bit lines to dramatically decrease parasitic capacitance. Use of the air spacer enables not only a higher level of scaling, but also rapid cell operation.
With these advancements, Samsung is now accelerating its plans for much faster introductions of next-generation DRAM chips and systems, including DDR5, HBM3, LPDDR5 and GDDR6, for use in enterprise servers, mobile devices, supercomputers, HPC systems and high-speed graphics cards.
Samsung has finished validating its 2nd-generation 10nm-class DDR4 modules with CPU manufacturers, and next plans to work closely with its global IT customers in the development of more efficient next-generation computing systems.
