RISC-V gunning for ARM at the high-end
- 저자:Ella Cai
- 에 출시:2017-11-29
An AI “supercomputer-on-a-chip” made on TSMC’s 7-nm process.
A 16-core “ET-Maxion” targeting highest single-thread performance
A 4,096-core “ET-Minion” targeting performance-per-watt with a vector floating-point unit in each core.
“Esperanto’s goal is to make RISC-V the architecture of choice for the most demanding AI and machine learning applications which will drive computing innovation for the next decade,” says Esperanto CEO Dave Ditzel, the former CEO of Transmeta, “by designing in leading-edge 7nm CMOS and with the simplicity of the RISC-V architecture, we can fit over four thousand full 64-bit cores each with vector accelerators on a single chip. By basing our chip on RISC-V we can take advantage of the growing software base of operating systems, compilers and applications. RISC-V is so simple and extensible that we can deliver world class TeraFlop levels of computing without needing to resort to proprietary instruction sets, thereby greatly increasing software availability.”
Up to now RIS-V has been positioned in relatively low-end applications like IoT,
Western Digital has taken a stake in Esperanto and says thst in the longer term it could be shipping two billion RISC-V cores a hear in its HDDs and SSDs,
“There is considerable industry interest in licensing the high-performance and energy-efficient cores we are developing,” adds Ditzel. “as a start-up, we are very focused on addressing our target markets with our AI chip, but we also want to help build the RISC-V ecosystem. We think that by licensing the cores we have in development, we can do both.”
A 16-core “ET-Maxion” targeting highest single-thread performance
A 4,096-core “ET-Minion” targeting performance-per-watt with a vector floating-point unit in each core.
“Esperanto’s goal is to make RISC-V the architecture of choice for the most demanding AI and machine learning applications which will drive computing innovation for the next decade,” says Esperanto CEO Dave Ditzel, the former CEO of Transmeta, “by designing in leading-edge 7nm CMOS and with the simplicity of the RISC-V architecture, we can fit over four thousand full 64-bit cores each with vector accelerators on a single chip. By basing our chip on RISC-V we can take advantage of the growing software base of operating systems, compilers and applications. RISC-V is so simple and extensible that we can deliver world class TeraFlop levels of computing without needing to resort to proprietary instruction sets, thereby greatly increasing software availability.”
Up to now RIS-V has been positioned in relatively low-end applications like IoT,
Western Digital has taken a stake in Esperanto and says thst in the longer term it could be shipping two billion RISC-V cores a hear in its HDDs and SSDs,
“There is considerable industry interest in licensing the high-performance and energy-efficient cores we are developing,” adds Ditzel. “as a start-up, we are very focused on addressing our target markets with our AI chip, but we also want to help build the RISC-V ecosystem. We think that by licensing the cores we have in development, we can do both.”
