Synopsys buys Sidense
- Autor:Ella Cai
- Zwolnij na:2017-10-18
The acquisition complements Synopsys’ existing DesignWare Multi-Time Programmable (MTP) NVM IP solution with OTP NVM IP in 16-bit to 1.28-Mbit configurations.
With this acquisition, Synopsys gains access to proven OTP NVM IP in process technologies from 180- to 16‑nm along with a team of highly experienced R&D engineers.
The terms of the deal, which is not material to Synopsys financials, have not been disclosed.
“Sidense’s OTP NVM IP offers designers a secure, area-efficient solution for fuse replacement, secure key storage, device ID, analog trim, and code storage,” said Joachim Kunkel, general manager of the Solutions Group at Synopsys. “By adding OTP NVM from Sidense to our DesignWare IP portfolio, Synopsys provides designers with a broader NVM IP solution that offers small area, fast access times and high reliability for their SoC designs.”
Sidense’s embedded one-transistor OTP technology is based on its patented split-channel 1T-Fuse bit-cell architecture that provides better yield, higher security, improved reliability and lower overall product cost. Sidense’s antifuse-based OTP NVM technology offers ultra-low power, small area NVM IP with read access times as fast as 10 nanoseconds.
The OTP NVM IP can be manufactured in standard-logic CMOS fabrication processes and does not require any additional mask layers or process steps. The IP is in high-volume production in automotive, mobile and industrial applications.
With this acquisition, Synopsys gains access to proven OTP NVM IP in process technologies from 180- to 16‑nm along with a team of highly experienced R&D engineers.
The terms of the deal, which is not material to Synopsys financials, have not been disclosed.
“Sidense’s OTP NVM IP offers designers a secure, area-efficient solution for fuse replacement, secure key storage, device ID, analog trim, and code storage,” said Joachim Kunkel, general manager of the Solutions Group at Synopsys. “By adding OTP NVM from Sidense to our DesignWare IP portfolio, Synopsys provides designers with a broader NVM IP solution that offers small area, fast access times and high reliability for their SoC designs.”
Sidense’s embedded one-transistor OTP technology is based on its patented split-channel 1T-Fuse bit-cell architecture that provides better yield, higher security, improved reliability and lower overall product cost. Sidense’s antifuse-based OTP NVM technology offers ultra-low power, small area NVM IP with read access times as fast as 10 nanoseconds.
The OTP NVM IP can be manufactured in standard-logic CMOS fabrication processes and does not require any additional mask layers or process steps. The IP is in high-volume production in automotive, mobile and industrial applications.
