Tegernsee: Cadence to license 3.4TMAC/W AI processor IP
- Автор:Ella Cai
- Отпустите на:2018-09-20
In Q1 2019, Cadence intends to license a Tensilica processor IP which can do many AI inferences on the device rather than the cloud.
Compared to doing AI inferences in the cloud the DNA 100 processor reduces latency, independence from poor connectivity and privacy.
The core is said to deliver up to 2,550 fps and 3.4 TeraMACs per Watt in a 16nm design for a 4K MAC configuration.
“You get better power efficiency on an APU (AI Processing Unit) than on a GPU or CPU,” Cadence’s Lazaar Louis (pictured) told the Publitek pre-Electronica meeting in Tegernsee this afternoon,
The IP supports AI frameworks including Caffe and TensorFlow and the Android Neural Network API for on-device AI inference.
The DNA 100 processor can run all neural network layers, including convolution, fully connected, LSTM, LRN, and pooling.
A single DNA 100 processor can scale from 0.5 to 12 effective TMACs, and multiple DNA 100 processors can be stacked to achieve 100s of TMACs for use in the most compute-intensive on-device neural network applications.
The DNA 100 processor incorporates a Tensilica DSP to accommodate any new neural network layer not currently supported by the hardware engines inside the processor, while offering a Tensilica Xtensa core using Tensilica Instruction Extension (TIE) instructions.
Because the DNA 100 processor has its own DMA, it can also run other control code without the need for a separate controller.
Cadence says the chip can help with face recognition, home surveillance, autonomous cars and AR/VR.
Compared to doing AI inferences in the cloud the DNA 100 processor reduces latency, independence from poor connectivity and privacy.
The core is said to deliver up to 2,550 fps and 3.4 TeraMACs per Watt in a 16nm design for a 4K MAC configuration.
“You get better power efficiency on an APU (AI Processing Unit) than on a GPU or CPU,” Cadence’s Lazaar Louis (pictured) told the Publitek pre-Electronica meeting in Tegernsee this afternoon,
The IP supports AI frameworks including Caffe and TensorFlow and the Android Neural Network API for on-device AI inference.
The DNA 100 processor can run all neural network layers, including convolution, fully connected, LSTM, LRN, and pooling.
A single DNA 100 processor can scale from 0.5 to 12 effective TMACs, and multiple DNA 100 processors can be stacked to achieve 100s of TMACs for use in the most compute-intensive on-device neural network applications.
The DNA 100 processor incorporates a Tensilica DSP to accommodate any new neural network layer not currently supported by the hardware engines inside the processor, while offering a Tensilica Xtensa core using Tensilica Instruction Extension (TIE) instructions.
Because the DNA 100 processor has its own DMA, it can also run other control code without the need for a separate controller.
Cadence says the chip can help with face recognition, home surveillance, autonomous cars and AR/VR.
